Category:Architecture/ARM/STR

From aldeid
Jump to navigation Jump to search
You are here
STR

Description

Store Register.

  • STRB: unsigned byte, zero extend to 32 bits on loads.
  • STRSB: signed byte, sign extend to 32 bits (LDR only).
  • STRH: unsigned halfword, zero extend to 32 bits on loads.
  • STRSH: signed halfword, sign extend to 32 bits (LDR only).
  • STR: word

Syntax

STR[B|SB|H|SH]{cond} Rt, [Rn, Rm {, LSL #n}]

where

cond
Is an optional condition code, see Conditional execution.
Rt
Specifies the register to load or store.
Rn
Specifies the register on which the memory address is based.
Rm
Specifies the register containing a value to be used as the offset.
LSL #n
Is an optional shift, with n in the range 0 to 3.

Examples

MOV     R3, #0
STR     R3, [R11,#var_1C]
MOV     R0, #0x20
BL      xmalloc
STR    R0, [R5, R1]         ; Store value of R0 into an address equal to
                            ; sum of R5 and R1
STR    R0, [R1, R2, LSL #2] ; Stores R0 to an address equal to sum of R1
                            ; and four times R2.

This category currently contains no pages or media.